Fin-FET TECHNOLOGY- Silicon-On-Insulator

by arun on August 16, 2009

The Fin-FET technology is being pursued by IBM and Motorola in academia. It refers to MOSFET which incorporates more than one gate into a single device. A Fin-FET transistor is forming a double-gate structure. These all devices have been create the generic name “finfets” because the source/drain region forms fins on the silicon surface. Generally, Double gate FET can reduce short channel effects. A silicon-on-insulator (SOI) method is an extending MOS scaling limitations for mainstream high performance. It is mainly based on Partially Depleted SOI and Fully Depleted SOI technologies.

structure of finfet

Characterzation- FinFET

A Fin FET device has especially faster switching times and higher current density. This device with gate oxide thickness is 12nm and a gate length is 10nm have been tested experimentally with good performance. Fabrication of Fin FET is compatible with CMOS process. DELTA transistor design of Fin-FET is that the conducting channel is wrapped around a thin silicon “fin”, which forms the body of the device.

Advantages of FinFET

• Improved Frequency Performance

• Improved High Temperature

• Reduced Capacitance from substrate to metal interconnect

• Improved Passive Components

• Better Area Efficiency

• Improved Latch up, Noise and Current immunity through the substrate.

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